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Cake day: June 17th, 2023

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  • Why mips and not RiscV? I would assume it’s easier to emulate in software and has good support in linux

    EDIT: found it

    Some architectures had arbitrarily-shifted operands all the time (ARM), some have shitty addressing modes necessitating that they would be slow (RISCV), some would need more than 4KB to even decode instructions (x86), and some were just too complex to emulate in so little space (PPC).

    Could it be the pc relative addressing often used on risc-v would be slow to run on 4004?